31 October 2026
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AI-Powered Precision: Tejas MK-2 to Feature India’s First Triple-Computer Architecture

India’s Tejas MK-2 will get a first-of-its-kind triple-computer architecture — raising safety, performance and indigenous capability to new heights.
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Indian Masterminds Stories

Bengaluru: India’s next-generation light combat aircraft, the Tejas MK-2 (Medium Weight Fighter) developed by the Aeronautical Development Agency (ADA) in coordination with Hindustan Aeronautics Limited (HAL), is pushing multiple technological frontiers. Known to incorporate over 90 % indigenous content in later production phases, Tejas MK-2 is being positioned as a key pillar of India’s air-superiority and self-reliance goals. 

Read Also: Next-Gen Push: Ex-IAF Chief Bhadauria Urges Switch from Tejas MK-1A to More Lethal MK-2 Variant

The wider programme replaces ageing fighter fleets and aligns with India’s “Atmanirbhar Bharat” objective in defence manufacturing. Tejas MK-2 is scheduled for prototype rollout by end-2025/early 2026 with induction planned around 2028-29. 

What’s new: Triple-computer architecture

According to a fresh report, Tejas MK-2 will feature India’s first triple-computer architecture — combining a Digital Flight Control Computer (DFCC), a Mission Management & Display Computer (MMDC), and a newly introduced Auxiliary Computer (AC). 

→ The DFCC handles fly-by-wire stability, control laws and essential flight systems. 

→ The MMDC processes mission data, sensor fusion, displays and tactical interface. 

The AC serves dual roles: 

(i) fail-over redundancy — it can take over DFCC or MMDC in case of malfunction; 

(ii) off-loads non-critical, data-intensive tasks such as terrain mapping, EW threat classification and fuel-optimisation analytics. 

This architecture offers enhanced fault tolerance, increased mission endurance and a high degree of autonomy — features normally reserved for much larger multi-engine fighters.

Importance of Triple Computer Architecture in Tejas MK-2 

Safety & redundancy – The auxiliary system means that even if one core computer fails, the jet remains mission-capable, raising survivability in combat.

Mission capability & autonomy – Offloading heavy computations frees the DFCC/MMDC to focus on real-time flight and combat tasks, improving response times.

Indigenous tech leadership – This step raises India’s defence electronics maturity, reducing import dependence and aligning with Make in India goals.

Future upgrade path – The AC is planned as a common module for both Tejas MK-2 and the forthcoming AMCA (Advanced Medium Combat Aircraft), making upgrades more streamlined and cost-effective. 

Current status & timeline

  • Prototype roll-out of the Tejas MK-2 is planned for late 2025 or early 2026. 
  • Full flight-testing and operational fielding expected around 2028-29. 
  • The triple-computer architecture is being validated in the simulation/test-bed environment (“Ironbird”) before actual flight trials.

Challenges ahead

Engine supply: Tejas programmes have previously faced delays due to engine delivery issues. 

Systems integration: The new architecture’s complexity demands rigorous testing to validate reliability, especially under combat-stress conditions.

Production ramp-up: Scaling to full production while maintaining high indigenous content will be a key test for HAL and the supply chain.

What it means for India’s air-defence posture

With Tejas MK-2 boasting modern systems, high indigenous content, and advanced avionics, the Indian Air Force (IAF) is set to fill capability gaps in production, multi-role operations and upgrade pathways. 

Read Also: From Imports to Innovation: India’s NETRA Mk-2 Gives ‘Made-in-India’ Wings to AWACS Power

The triple-computer architecture adds a layer of sophistication previously limited to high cost international fighters, yet tailored to India’s strategic and budgetary context.


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